1. Field of the Invention
The present invention relates to a system-level functional logic simulating technique used for design verification of a large-scale system LSI with a plurality of functional modules.
2. Description of the Prior Art
The development of miniaturization and integration technology of LSIs has allowed a large-scale integrated circuit on a system level to be integrated on one LSI chip. In the development of such a system LSI, it is necessary to design for a system LSI top-down while verifying the processing system design, the function operation, the logic and the layout step by step so that the system LSIs can be produced in a short period of time. With the growth of the design scale, improvements on the design technique are required in design techniques and automated design techniques. In particular, techniques for efficient verification of the functional operation of one LSI chip system are required. The functional verification is generally performed by simulation on a general-purpose computer using a circuit description verifier in a hardware description language that utilizes test vectors. Since the simulation time of LSIs increases exponentially with the enlargement of the circuit scale, it is essential to speed up this simulation. High speed is particularly required in simulation for functional verification for one chip, because circuits with several millions of gates are tested routinely. Currently it is estimated to take several weeks to a month or more to complete the verification. Thus, it is very important to achieve high speed in various simulations.
Event-driven simulation and cycle-based simulation are well-known as simulation methods. In the event-driven simulation, a signal is traced from its input to a circuit throughout the path to where the signal is routed so as to monitor signal value changes in the circuit, which are commonly referred to as events. Thus, the changes in the circuit status are calculated. In the cycle-based simulation, using a clock signal as a reference, all the changes in the status of the circuit are calculated in relation to a signal value transition of the clock signal. In view of the simulation processing rate, the cycle-based simulation is generally faster, because synchronous circuit design with a clock signal provided is the mainstream. In the event-driven simulation, additional processing is performed to trace events. When simulating the operation of a circuit having signal value changes only in a part of the circuit, calculation is performed only with respect to the operation in the part of the circuit selected based on the events. Therefore, the event-driven simulation is efficient in this case. In addition, in the event-driven simulation, asynchronous circuit operation can be simulated. However, when simulating a synchronous circuit where changes in signal values are effected in the entire circuit at a time defined by the clock signal, the event-processing becomes an overhead. For this reason, the cycle-based simulation can be faster.
As described above, the cycle-based method is effective to simulate a synchronous circuit in high speed. For the simulation of a large-scale system LSI, there are an apparatus and a method, where the functional modules constituting the system LSI on one chip are simulated while a simulation method is selected for every functional module. Such an apparatus and a method are advantageous primarily because the functional modules constituting the system LSI are operated with different clock signals or include a memory or an input-output circuit section that operates asynchronously.
In the one chip simulation of the system LSI, all the functional modules are unlikely to operate equally. Typically, only specific functional modules operate actively, and other modules hardly operate. In view of high speed for simulation, the cycle-based method is advantageous for the simulation of the functional modules where many events occurs, and the event-driven method is advantageous for the simulation of the functional modules where events scarcely occurs.
However, there is a problem in that the conventional simulators or simulating methods for a system LSI have no means for providing a quantitative standard for selecting a simulation method appropriate to each functional module. More specifically, when selecting the simulation method, a designer who performs simulation only can judge from an estimate based on the design circuit or the specification of the test patterns. As a result, when the designer has selected an inappropriate simulation method, simulation takes a long time.
Furthermore, when simulating a complicated long-time operation of a circuit, it is likely that a functional module that has operated actively in an early stage of the simulation stops or hardly operates in the middle of the simulation. This occurs, for example in the simulation of a circuit that stops supplying a clock signal to specific functional modules in accordance with the operation mode, for the purpose of reducing power consumption. In order to simulate the operations from the supply to the stop of the clock signal in such a circuit at high speed by combining the simulation methods, it is necessary to change the simulation method for each functional module during the performance of the simulation in accordance with the operation status of the functional module, namely, the occurrence of events. However, there is no means for dynamically changing the simulation method that has been selected for each functional module during the performance of the simulation based on a quantitative standard, so that high-speed simulation cannot be performed.
Therefore, with the foregoing in mind, it is an object of the present invention to provide a simulator capable of determining and selecting a simulation method appropriate to each functional module so that high-speed LSI simulation can be performed.
In order to achieve the aforementioned object, a simulator of the present invention performs simulation with a small-scale test vector selected for a test before simulation with a desired test vector, so that a simulation method to be used for the simulation with a desired test is determined based on the event incident status of each function module of the LSI to be simulated. The small-scale test vector selected for the test is referred to as xe2x80x9cfirst test vector setxe2x80x9d, and the desired test vector is referred to as xe2x80x9csecond test vector setxe2x80x9d.
A simulator of the present invention comprises means for counting the number of events occurring in each of functional modules constituting an LSI and means for calculating an index value for selecting a simulation method for each functional module in a particular simulation of the operation of the LSI with a first test vector set; means for selecting one simulation method among a plurality of simulation methods for each functional module based on the selection index value; and means for controlling execution of simulation of the LSI operating with a second test vector set in the simulation method selected for each functional module.
This embodiment makes it possible to select a simulation method appropriate to each module with a selection index value calculated based on the number of events occurring in each module. Thus, simulation can be performed in a higher speed.
In one embodiment of the simulator of the present invention, the plurality of simulation methods preferably comprise a cycle simulation method in which the functional modules are simulated in a clock signal cycle and an event-driven simulation method in which the functional modules are simulated in an event-driven manner. They are typical simulation methods.
In another embodiment of the simulator of the present invention, the number of events that has been counted during a predetermined period of time is preferably used as the selection index value. Switching the simulation method between the typical cycle simulation method and event-driven simulation method depending on the number of events allows high-speed simulation.
In still another embodiment of the simulator of the present invention, an event incident rate obtained by dividing the counted number of events by a product of the circuit scale of the functional module and the simulation unit time is more preferably used as the selection index value. Since a simulation method appropriate to each functional module is selected based on the event incident rate, the operation status of the circuit also can be judged in view of the scale of the functional module and the simulation time. This makes it possible to select a more appropriate simulation method, thus resulting in high-speed simulation as a whole.
In yet another embodiment of the simulator of the present invention, the control means preferably controls such that the simulation with the second test vector set is stopped temporarily after a predetermined period has lapsed; the selection index value is re-calculated; the simulation method for each functional module is selected among the plurality of simulation methods based on the recalculated selection index value; and the simulation of the LSI operation with the second test vector set that has been stopped temporarily is resumed.
In this embodiment, the selection index value for each module is re-calculated based on the operation status of LSI that is being simulated after every predetermined period during which simulation is executed, so that the simulation method is re-selected. Thus, in the case where the operation status is significantly changed in the simulation of the long-term and complicated operation of the circuit, it is possible to adopt an optimal simulation method in response to the change in the operation status.
In another embodiment of the simulator of the present invention, the selection index value calculating means preferably counts the number of events only with respect to an input signal. Since it is sufficient only to monitor the input signal, the simulation with the first test vector set can be performed at higher speed.
In still another embodiment of the simulator of the present invention, the selection index value calculating means preferably counts the number of events only with respect to a clock signal. Since it is sufficient only to monitor the clock signal, the simulation with the first test vector set can be performed at even higher speed.
According to another aspect of the present invention, a computer-readable recordable medium having a program for execution on a computer recorded thereon is provided. The program comprises the steps of counting the number of events occurring in each of functional modules constituting an LSI so as to calculate an index value for selecting a simulation method for each functional module in a particular simulation of an operation of the LSI with a first test vector set; selecting one simulation method among a plurality of simulation methods for each functional module based on the selection index value; and simulation the LSI operation with a second test vector set in the simulation method selected for each functional module.
When the program is loaded and executed on a computer, a simulation method appropriate to each functional module can be selected with the selection index value calculated based on the number of events occurring in each functional module. Thus, this invention achieves a simulator that can perform simulation at a higher speed.
As described above, according to the present invention, the event-driven simulation is performed with the short test vector in the first step so as to distinguish the functional modules on the basis of whether a large number of events occur or events scarcely occurs, or the entire module operates actively or only a part thereof operates. The cycle-based simulation is automatically performed for the former functional modules. On the other hand, the event-driven simulation is automatically performed for the latter functional modules. Thus, the simulation methods can be combined appropriately without the designer making detailed investigation on the characteristics of the circuit operation or the test vector for the simulation of a large-scale system LSI. Thus, simulation is performed in a shorter time.
Furthermore, in the case where a change in the operation status of the functional module such as the stop of the clock signal is effected during LSI simulation, it is possible to adopt an optimal simulation method in response to the change in the operation status. Thus, the simulation of the complicate operation of the large-scale LSI can be performed efficiently.
These and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.